CMOS and ECL represent two logic families in use today. Each logic family is used by manufacturers of silicone chips to produce integrated circuit devices incorporating transistors or other components of a specific logic family. However, since CMOS and ECL logic families have different electrical characteristics, they cannot be readily connected to one another.
For example, a device incorporating the CMOS logic family will typically have 0 quiescent power consumption and a wide supply range voltage between 3 to 12 V. The output of the CMOS logic family swings rail-to-rail, and the inputs draw little current. A CMOS device is also characterized by a slower switching speed and typically operates at low frequency. On the other hand, an ECL circuit operates at high speed and uses a negative power supply with closely spaced voltage level swings of about -0.9 V to -1.75 V. It is often desirable to combine both families within a single circuit to take advantage of the characteristics of each logic family. However, because of their different signal characteristics, an ECL device may not be connected directly to a CMOS device and vice versa.
The prior art solves this problem by providing a CMOS to ECL translator when a CMOS device is desired to drive an ECL device. Also, an ECL to CMOS translator will be used when an ECL device is needed to drive a CMOS device. These translators serve to match the current and voltage characteristics of one logic family to the other. However, the design of these translators involves extra components either added to the discrete circuit or incorporated onto the silicon chip embodying the circuit. This adds to the cost, size, power requirements and complexity of the circuit.